About Me
I am currently pursuing a combined M.S/Ph.D. degree in the Department of Electrical and computer engineering at SungKyunKwan University. My research focuses on Deep/Convolutional Neural Network (D/CNN) mapping in the Processing‑In‑Memory (PIM) architecture for energy‑efficient and faster PIM‑based D/CNN inference. To achieve this goal, I am exploring diverse approaches including weight mapping, pattern‑based pruning, and kernel shape control (KERNTROL). CV
Awards
[A7] Grand Prize in Exynos AI Challenger 2024
Samsung Electronics S.LSI
[A6] 3rd Palce in DAC 2024 System Design Contest - GPU Track
Design Automation Conference (DAC) 2024
[A5] Most Popular Poster Award at the Student Research Forum
29th Asia and South Pacific Design Automation Conference (ASP-DAC) 2024
[A4] IEEE CASS Student Travel Grant Selection
IEEE Circuits and System Society (CAS) 2023
[A3] Best Paper Award
Korean Artificial Intelligence Association 2023
[A2] SKKU Innovation Reserach Fellowship Scholarship Selection
Brain Korea (BK) Graduate School Innovation Support Project 2022
[A1] 2nd Place Winner of Artificial Intelligence Grand Challenge
Institute of Information & Communications Technology Planning & Evaluation, Korea, 2020
Projects
[P3] HW-SW co-design technique for low-power real-time in-memory deep learning operation
- Study about the efficient convolution operation in the PIM systems (Mar 2023 - Present)
Samsung Advanced Institute of Technology (SAIT)
[P2] SPAD‐based direct‐TOF camera
- Assist to obtain (or generate) 3D training input data using direct‐TOF camera (Apr 2020 - Dec 2021)
Samsung Advanced Institute of Technology (SAIT)
[P1] Research on in‐sensor processing for next‐generation CMOS image sensor
- Assist to design a part of digital circuit for the gaze tracking (Nov 2020 - May 2021)
Samsung Advanced Institute of Technology (SAIT)
Journal Papers
[J4] A Charge Domain Variable-Precision Computation-In-Memory Macro Using All-Around-Wire-Capacitor with Array Embedded DA/AD Conversions
Gicheol Shin, Donguk Seo, Jaerok Kim, Johnny Rhe, Minhueok Jeong, Eunyoung Lee, Seongo Kim, Soyoun Jeong, Jong Hwan Ko, and Yoonmyung Lee
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2024. In review.
[J3] KERNTROL: Kernel Shape Control Towards Ultimate Memory Utilization for In-Memory Convolutional Weight Mapping
Johnny Rhe, Kang Eun Jeon, Joo Chan Lee, Seongmoon Jeong, Jong Hwan Ko
IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2024. Link
[J2] VWC-SDK: Convolutional Weight Mapping Using Shifted and Duplicated Kernel With Variable Windows and Channels
Johnny Rhe, Sungmin Moon, Jong Hwan Ko
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2022. Link
[J1] A Charge-Domain Scalable-Weight In-Memory Computing Macro With Dual-SRAM Architecture for Precision-Scalable DNN Accelerators
Eunyoung Lee, Taeyoung Han, Donguk Seo, Gicheol Shin, Jaerok Kim, Seonho Kim, Soyoun Jeong, Johnny Rhe, Jaehyun Park, Jong Hwan Ko, Yoonmyung Lee
IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2021. Link
Conference Papers
[C10] Row-Efficient Pruning for In-Memory Convolutional Weight Mapping
Johnny Rhe, Jong Hwan Ko
International SoC Design Conference (ISOCC), 2024.
[C9] ConvMapSim: Modeling and Simulating Convolutional Model Mapping for PIM Arrays
Kang Eun Jeon, Wooram Seo, Johnny Rhe, Jong Hwan Ko
IEEE Artificial Intelligence Circuits and Systems (AICAS), 2024.
[C8] An Efficient Ventricular Arrhythmias Detection on Microcontrollers with Optimized 1D CNN
Chanwook Hwang, Jaehyeon So, Johnny Rhe, Jiyoon Kim, Juhong Park, Kang Eun Jeon, Jong Hwan Ko
IEEE Artificial Intelligence Circuits and Systems (AICAS), 2024.
[C7] KARS: Kernel-Grouping Aided Row-Skipping for SDK-based Weight Compression in PIM Arrays
Juhong Park, Johnny Rhe, Jong Hwan Ko
IEEE International Symposium on Circuits and Systems (ISCAS), 2024.
[C6] DCR: Decomposition-Aware Column Re-Mapping for Stuck-At-Fault Tolerance in ReRAM Arrays
Hyeonsu Bang, Kang Eun Jeon, Johnny Rhe, Jong Hwan Ko
IEEE International Conference on Computer Design (ICCD), 2023. Link
[C5] Kernel Shape Control for Row-Efficient Convolution on Processing-In-Memory Arrays
Johnny Rhe, Kang Eun Jeon, Joo Chan Lee, Seongmoon Jeong, Jong Hwan Ko
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023. Link
[C4] Weight-Aware Activation Mapping for Energy-Efficient Convolution on PIM Arrays
Kang Eun Jeon, Johnny Rhe, Jong Hwan Ko
IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2023. Link
[C3] PAIRS: Pruning-AIded Row-Skipping for SDK-Based Convolutional Weight Mapping in Processing-In-Memory Architectures
Johnny Rhe, Kang Eun Jeon, Jong Hwan Ko
IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2023. Link
[C2] VW-SDK: Efficient convolutional weight mapping using variable windows for processing-in-memory architectures
Johnny Rhe, Sungmin Moon, Jong Hwan Ko
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022. Link
[C1] A Charge-Domain Computation-In-Memory Macro with Versatile All-Around-Wire-Capacitor for Variable-Precision Computation and Array-Embedded DA/AD Conversions
Gicheol Shin, Donguk Seo, Jaerok Kim, Johnny Rhe, Eunyoung Lee, Seonho Kim, Soyoun Jeong, Jong Hwan Ko, Yoonmyung Lee
IEEE European Solid-State Device Research Conference (ESSDERC), 2021. Link